1. Field of the Invention
This invention relates to column-redundancy techniques for integrated-circuit memory devices.
2. Prior Art
Whenever one or more memory cells in a particular column of an integrated-circuit memory chip are defective, the entire memory column is considered to be defective and a redundant memory column is substituted for the defective column. To program a memory chip to substitute a redundant column for a defective memory column, a number of programming fuses are blown with a laser beam. Conventional column-redundancy methodology in an integrated-circuit memory device normally requires a large number of fuses for each redundant column, which uses a considerable area of the integrated-circuit chip.
When a particular Y select address for a redundant column is received in a memory chip with a conventional column-redundancy approach, the memory chip is programmed to enable a redundant senseamp and also to disable a normal senseamp. This is accomplished by blowing one fuse to turn on transfer gates that allow all of the Y-select signals to go to a redundant Y select NAND circuit. Then, since all of the signals are going to the NAND circuit, eight more fuses are blown to stop unwanted Y select signals from getting to the NAND circuit. One more fuse is then blown to disable the normal Y-select NAND circuit enable signal. Blowing ten of nineteen fuses causes the normal senseamp to go to an inactive state and the redundant senseamp to go to an active state.
To connect the redundant senseamp to a particular output buffer, the output terminal of the redundant senseamp is connected through series fuses to each one of eight internal data bus lines, where each internal data buss line connects to a particular output buffer. To connect the redundant senseamp to a particular output buffer seven of eight fuses are required to be blown.
For writing data into the memory chip, eight series fuses are used to connect the internal data bus lines to a common node that goes to the drivers of the redundant bit line and bit inverse columns. To remove the unwanted connections of this scheme, seven additional fuses have to be blown.
For the conventional column redundancy methodology described above, the number of fuses per redundant column is 35 and the number of fuses blown per redundant column is 24. An example of a conventional column redundancy methodology, which illustrates the total number of fuses required for conventional column-redundancy, is a 4 Mbit SRAM with 32 redundant columns. Each of the redundant columns requires 35 for a total of 1120 fuses. For the 4 Mbit SRAM, a minimum of 24 fuses are required to be blown for each redundant column. Therefore, utilizing all 32 of the redundant columns requires a minimum of 768 fuses to be blown. The locations of all of these 1120 fuses must be programmed into the software that controls a laser that is used to blow these fuses. In the fabrication and testing of memory chips that have conventional redundant memory columns, additional time and expense are required to blow all of the fuses for substitution of a redundant memory column for a damaged or otherwise unusable memory column.
Consequently, a need exists for a column-redundancy methodology for an integrated-circuit memory chip that greatly reduces the number of fuses required to be blown for substitution of a redundant column for a defective column.